#!/bin/sh
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rm -rf simv* csrc DVEfiles AN.DB

echo "Compiling Core Simulation Models"
vlogan +v2k \
      ../../../ten_gig_eth_pcs_pma.v \
  ../../example_design/gtx/ten_gig_eth_pcs_pma_gt_usrclk_source.v \
  ../../example_design/gtx/ten_gig_eth_pcs_pma_gtwizard_10gbaser.v \
  ../../example_design/gtx/ten_gig_eth_pcs_pma_gtwizard_10gbaser_gt.v \
  ../../example_design/ten_gig_eth_pcs_pma_example_design.v \
  ../../example_design/ten_gig_eth_pcs_pma_block.v \
      ../demo_tb.v
vcs +vcs+lic+wait \
    -debug \
    demo_tb glbl
./simv -ucli -i ucli_commands.key
dve -vpd vcdplus.vpd -session vcs_session.tcl
